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PART I
This Annual Report on Form 10-K, particularly in Item 1 “Business” and Item 7 “Management’s Discussion and Analysis of Financial Condition and Results of Operations,” includes forward-looking statements within the meaning of Section 27A of the Securities Act of 1933 (the “Securities Act”) and Section 21E of the Securities Exchange Act of 1934, as amended (the “Exchange Act”). These statements include, but are not limited to, statements concerning: expectations about the effectiveness of our business and technology strategies; expectations regarding stock market and global economic trends; expectations regarding previous and future acquisitions; current semiconductor industry trends; expectations of the success and market acceptance of our intellectual property and our solutions; expectations that our cash, cash equivalents and cash generated from operations will satisfy our business requirements for the next twelve months; expectations of our future liquidity requirements; and our ability to obtain additional financing when needed. Our actual results could differ materially from those projected in the forward-looking statements as a result of a number of factors, risks and uncertainties discussed in this Form 10-K, especially those contained in Item 1A of this Form 10-K. The words “may,” “anticipate,” “plan,” “continue,” “could,” “projected,” “expect,” “believe,” “intend,” and “assume,” the negative of these terms and similar expressions are used to identify forward-looking statements. All forward-looking statements and information included herein is given as of the filing date of this Form 10-K with the Securities and Exchange Commission (“SEC”) and based on information available to us at the time of this report and future events or circumstances could differ significantly from these forward-looking statements. Unless required by law, we undertake no obligation to update publicly any such forward-looking statements.
The following information should be read in conjunction with the Consolidated Financial Statements and notes thereto included in this Annual Report on Form 10-K. All references to fiscal year apply to our fiscal year that ends on December 31.
Item 1. Business
Business Overview
PDF Solutions is a leading provider of infrastructure technologies and services to lower the cost of integrated circuit (“IC”) design and manufacturing, enhance time to market, and improve profitability by addressing design and manufacturing interactions from technology development and product design to initial process ramps to mature manufacturing operations. Our technologies and services target the entire “process life cycle,” which is the term we have coined for the time from technology development and the design of an IC through volume manufacturing of that IC. Our solutions combine proprietary software, physical intellectual property in the form of cell libraries for IC designs, test chips, an electrical wafer test system, proven methodologies, and professional services. We analyze yield loss mechanisms to identify, quantify, and correct the issues that cause yield loss. Our analysis drives IC design and manufacturing improvements to enable our customers to optimize the technology development process, to increase initial yield when an IC design first enters a manufacturing line, to increase the rate at which yield improves, and to minimize excursions and process variability that cause yield loss throughout mass production. The result of successfully implementing our solutions is the creation of value that can be measured based on improvements to our customers’ actual yield. Through our gainshare performance incentives component, we have aligned our financial interests with the yield and performance improvements realized by our customers, and we receive revenue based on this value. Our technologies and services have been sold to leading integrated device manufacturers, fabless semiconductor companies, and foundries.
The key benefits of our solutions to our customers are:
Faster Time to Market. Our solutions are designed to accelerate our customers’ time-to-market and increase product profitability. Our solutions, which can predict and improve product yield even before IC product design is complete, transform the traditional design-to-silicon sequence into a primarily concurrent process, thereby shortening our customers’ time-to-market. Systematically incorporating knowledge of the integration of the design and manufacturing processes into our software modules and physical IP enables our customers to introduce products with higher initial yields faster. Our solutions are designed to decrease design and process iterations and reduce our customers’ up-front costs, and thus provide our customers with early-mover advantages such as increased market share and higher selling prices.
Faster Time to Volume. After achieving higher initial yields and faster time-to-market, our solutions are designed to enable our customers to isolate and eliminate remaining yield issues to achieve cost efficient volume manufacturing. Once a manufacturing process has been modeled using our solutions, our customers are able to diagnose problems and simulate potential corrections more quickly than using traditional methods. In addition, if process changes are required, improvements can be verified more quickly using our technology than using traditional methods. Our solutions thus enable our customers to quickly reach cost efficient volume, so that they are able to increase margins, improve their competitive position, and capture higher market share.
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Increased Manufacturing Efficiencies. Our solutions for product design, product introduction, yield ramp, and process control are designed to allow our customers to achieve a higher yield at mass production and therefore a lower cost of goods sold. In addition, our solutions, which also include fault detection and classification (“FDC”) software, are designed to provide our customers with the ability to proactively monitor process health to avoid potential yield problems.
Our long-term business objective is to maximize IC yield by providing the industry standard in technologies and services for the Process Life Cycle. To achieve this objective, we intend to:
Extend Our Technology Leadership Position. We intend to extend our technology leadership position by leveraging our experienced engineering staff and codifying the knowledge that we acquire in our solution implementations. For example, we continue to expand and develop new technology that leverages our Characterization Vehicle® (CV®) methodology to embed test structures on product wafers. This provides valuable insight regarding product yield loss during mass production with minimal or no increase in test time and non-product wafers. In addition, we selectively acquire complementary businesses and technologies to increase the scope of our solutions.
Leverage Our Gainshare Performance Incentives Business Model. We intend to continue expanding the gainshare performance incentives component of our customer contracts. We believe this approach allows us to form collaborative and longer-term relationships with our customers by aligning our financial success with that of our customers. Working closely with our customers on their core technologies that implement our solutions, with a common focus on their business results, provides direct and real-time feedback for continual improvement of our solutions. We believe that we will generate expanded relationships with customers that engage us on terms that include a significant gainshare performance incentive component.
Focus on Key IC Product Segments and High-Growth Adjacent Markets. We intend to focus our solutions on high-volume, high-growth IC product segments such as system-on-a-chip, memory, CMOS image sensor, and high-performance central processing units. As a result, we will continue to expand our solutions for technology drivers such as low-k dielectrics, high-k metal gates, immersion lithography, double patterning, SOI, Finfets, copper, and 300mm wafer fabs, which are all still somewhat new or are relatively complex manufacturing technologies. We believe that these product segments are particularly attractive because they include complex IC design and manufacturing processes where processed silicon is costly and yield is critical. In addition, we have expanded our efforts to penetrate relatively new and potentially high-growth adjacent markets, such as photovoltaic and LED manufacturing, and we are leveraging our yield management system and FDC technology to create products that meet the needs of these markets.
Expand Strategic Relationships. We intend to continue to extend and enhance our relationships with companies at various stages of the design-to-silicon process, such as process licensors, manufacturing and test equipment vendors, electronic design automation vendors, silicon IP providers, semiconductor foundries, and contract test and assembly houses.
PDF Solutions was incorporated in Pennsylvania in November 1992. We reincorporated in California in November 1995 and reincorporated in Delaware in July 2000. In July 2001, the company completed an initial public offering and our shares of common stock are currently traded on the NASDAQ. Headquartered in San Jose, California, PDF Solutions operates worldwide with additional offices in China, Europe, Japan, Korea, Singapore, and Taiwan.
Industry Background
Rapid technological innovation, with increasingly shorter product life cycles, now fuels the economic growth of the semiconductor industry. IC companies historically ramped production slowly, produced at high volume once products gained market acceptance, and slowly reduced production volume when price and demand started to decrease near the end of the products’ life cycles. Now, companies often need to be the first to market and the first to sell the most volume when a product is first introduced so that they have performance and pricing advantages over their competition, or else they lose market opportunity and revenue. Increased IC complexity and compressed product lifecycles create significant challenges to achieve competitive initial yields and optimized performance. For example, it is not uncommon for an initial manufacturing run to yield only 20%, which means that 80% of the ICs produced are wasted. Yield improvement and performance optimization are critical drivers of IC companies’ financial results because they typically lead to cost reduction and revenue generation concurrently, causing a leveraged effect on profitability.
Technology and Intellectual Property Protection
We have developed proprietary technologies for yield simulation, analysis, loss detection, and improvement. The foundation for many of our solutions is our CV infrastructure (“CVi”) that enables our customers to characterize the manufacturing process, and establish fail-rate information needed to calibrate manufacturing yield models, prioritize yield improvement activities and speed-up process learning-cycles. Our CVi includes proprietary Characterization Vehicle® test chips, including designs of experiments and layout designs, and a proprietary and patented highly parallel electrical functional and parametric-test system, comprised of hardware and software designed to provide an order-of-magnitude reduction in the time required to test our Characterization Vehicle® test chips. In addition, our technology embodies many algorithms, which we have developed over the course of many years, and which are implemented in our products including dataPOWER®, pdCVtm, mæstria®, and pdBRIXtm, among others. Further, our IP includes methodologies that our implementation teams use as guidelines to drive our customers’ use of our CV® test chips and technologies, quantify the yield-loss associated with each process module and design block, simulate the impact of changes to the design and/or to the manufacturing process, and analyze the outcome of executing such changes. We continually enhance our core technologies through the codification of knowledge that we gain in our solution implementations.
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Our future success and competitive position rely to some extent upon our ability to protect these proprietary technologies and IP, and to prevent competitors from using our systems, methods, and technologies in their products. To accomplish this, we rely primarily on a combination of contractual provisions, confidentiality procedures, trade secrets, and patent, copyright, mask work, and trademark laws. We license our products and technologies pursuant to non-exclusive license agreements that impose restrictions on customers’ use. In addition, we seek to avoid disclosure of our trade secrets, including requiring employees, customers, and others with access to our proprietary information to execute confidentiality agreements with us and restricting access to our source code. We also seek to protect our software, documentation, and other written materials under trade secret and copyright laws. As of December 31, 2011, we held 60 U.S. patents. We intend to prepare additional patent applications when we feel it is beneficial. Characterization Vehicle®, Circuit Surfer®, CV®, dataPOWER®, mæstria®, ModelWare®, pdFasTest®, PDF Solutions®, the PDF Solutions logo, Yield Ramp Simulator®, and YRS® are registered trademarks of PDF Solutions, Inc. or its subsidiaries, and Design-to-Silicon-Yieldtm, dataPOWER® VSF™, dP-bitMAPtm, dP-Defecttm, dP-Miningtm, dP-SSAtm, dP-Variability Analysis™, dP-WorkFlow™, exensio™, pdBRIXtm, pdCVtm, Template™, exensio™ and YA-FDC™ are our common law trademarks.